1. Field of the Invention
The present invention relates to a semiconductor device and, more particularly, to a semiconductor device having a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) structure.
2. Related Background Art
In recent years, demand for a power MOSFET has been rapidly increasing in the field of a switching power source of heavy current and high breakdown voltage and, in addition, in the field of switching elements for energy saving of mobile communication devices such as a notebook-sized PC (Personal Computer). Since the power MOSFET is often used for a power management circuit, a safety circuit of a lithium ion battery, and the like in these fields, driving with a lower voltage so that the device can be directly driven with a battery voltage, lower ON-state resistance, reduction in capacitance Qgd between a gate and a drain for reducing a switching loss, and the like are strongly demanded.
A conventional vertical-type power MOSFET will be described with reference to a schematic cross section of FIG. 26. In the following diagrams, like parts are designated by like reference numerals and repetitive descriptions thereof will be appropriately omitted.
In a power MOSFET 100 shown in FIG. 26, a drain electrode 12 is provided on the under face of an n+ type low-resistance semiconductor substrate 10, and an n− type high-resistance epitaxial layer 50 is formed on the top face of the low-resistance semiconductor substrate 10. In a surface portion of the high-resistance epitaxial layer 50, a p type base layer 14 is selectively formed. In a surface portion of the p type base layer 14, an n+ type source layer 16 is selectively formed. In a surface portion of the p type base layer 14, a highly-doped p type region 18 is selectively formed so as to be adjacent to the n+ type source layer 16. In the surface portion of the high-resistance epitaxial layer 50, in a region sandwiched by the p-type base layers 14, an Njfet region 90 is selectively formed, into which an n-type impurity is doped at a higher concentration as compared with the high-resistance epitaxial layer 50. On the surface of the Njfet region 90, the surfaces of the p-type base layers 14 sandwiching the Njfet region 90, and the surfaces of end portions of the n+ type source layers 16 facing each other so as to sandwich the Njfet region 90, a gate electrode 94 is provided via a gate insulating film 92. On the surfaces of the n+ type source layers 16 and the surfaces of the highly-doped p type regions 18, source electrodes 20 are provided so as to sandwich the gate electrode 94.
For the power MOSFET 100 having such a structure, it is necessary to make the Njfet region 90 easily depleted in order to reduce the gate-drain capacitance Qgd.
However, when the impurity concentration of the Njfet region 90 is lowered to make the Njfet region 90 easily depleted, a problem occurs such that an ON-state resistance Ron of the device increases and, as a result, a breakdown voltage of the device decreases.